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SN11030
2002/6/26 0.2
Confidential
USB to CF/ATA/SM/Flash Interface Controller, Mass Storage Class Compliant
1 General Description
SN11030 is a high-performance integrated circuit to bridge USB and CF/ATA/SM/Flash compliance devices. It provides a flexible and cost efficient single chip solution for external storage applications that intend to utilize the convenience of USB. To help the system manufacturers to build high quality, low cost USB storage systems, several special features are implemented. SN11030 can be easily configured to access CF, ATA device, SM, NAND type flash or any combination of the above. This diversity in function relieves the component sourcing task of the system builders. With the ability to support flash memory, the combo system which supports both card reader and thumb drive can be built without any special effort. The embedded translation table help the system makers to design a high performance SM card or NAND type flash accessing device but still keeps the cost low. The proprietary randomization algorithm effectively extends the lifetime of the SM card and flash memory, ensuring the robustness of the system. The real time ECC correction keeps the data integrity while still maintains the high data transfer rate. The external serial EEPROM provides the possibility to customize the USB identity for each product. The OEM makers could make products for different customers by just putting the vendor/product ID and names in the EEPROM but still keep other things the same. The serial number can help the system manufacturers to track down every single device they made even when the design and the PID/VID are all the same. The USB Mass Storage Class compliance capability of SN11030 makes it a truly "plug-and-play" device without vendor drivers needed under the OS like Windows 2000/ME/XP and Mac OS 9/10. This feature not only makes the system developing faster and easier, but also reduces the cost and increases the reliability. The SN11030 even provides the capability to boot the PC. Therefore, the system manufacturers can use it to build a much faster, high capacity, reliable, and portable system to replace the legacy floppy disk easily. With so many functions built- in and the high performance, easy to design- in
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SN11030
Confidential
2002/6/26 0.2 architecture, SN11030 is an ideal choice for building a portable USB to CF/ATA/SM/Flash storage system.
2 Features
l l l l l l l l l l 12 MHz USB 1.1 full-speed compatible. USB 1.1 Mass Storage Class compliant USB Mass Storage Class Bulk-Only Transport 1.0 supported USB Mass Storage Class SCSI transparent command set supported 12 characters of serial number and up to 28 characters of Vendor/Product/Revision string supported with external EEPROM Support PIO mode CF/ATA/ATAPI device Support 3.3V, 4Mbytes to 128 Mbytes SSFDC(SmartMedia Card), Type I/II CompactFlash card and MicroDrive. Support NAND-type flash memory, from 4Mbytes to 128 Mbytes. Real-time ECC correction circuit to ensure the data integrity and accelerate the access speed for SmartMedia/NAND-type flash. Built- in SRAM to support logical-to-physical address translation for SmartMedia/NAND-type flash to reduce cost and increase performance and reliability Supports Hot-Swapping among flash memory, CF card and SM card without un-plug USB. Built- in FIFO for upstream and downstream data transfer Data transfer rate up to 1.5 MB/s (burst), 1.1 MB/s (read average), Pin selectable high-power (500mA) or low-power (100mA) 3 LED lightening pins available. One for CF, one for SM, and one for CF + SM (version 2 only) PC boot up capability provided (PC BIOS needs to support USB ZIP boot up) (version 2 only) No Driver needed under Microsoft Windows ME/2000/XP, Mac OS 9.x/10.x Driver support Microsoft Windows 98 Multiple icon driver support for Microsoft Windows 2000 and Mac OS 9 Single 3.3V operation 80 pin LQFP package.
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SN11030
2002/6/26 0.2
Confidential
3 Pin Assignment
Pin# PAD Name 1 2 3 4 5 6 7 8 9 11 GND CFD12_SMD6 CFD5_SMD2 CFD13_SMD7 CFD6_SMD1 CFD14_SMD0 SMWP SMRB VDD CFD7_SMWE Type Drive Special Description PWR DIO 8mA PD DIO 8mA PD DIO 8mA PD DIO 8mA PD DIO 8mA PD DO 8mA DI PWR PWR DIO 8mA PD DIO 8mA PD DO 8mA DO 8mA DO 8mA DO 8mA DI PU Digital ground ATA data bit 12 / SM data bit 6 ATA data bit 5 / SM data bit 2 ATA data bit 13 / SM data bit 7 ATA data bit 6 / SM data bit 1 ATA data bit 14 / SM data bit 0 SM write protect SM ready/busy Digital 3.3V Digital ground ATA data bit 7 / SM write enable ATA data bit 15 / SM read enable ATAPI chip select 0 ATAPI chip select 1 ATAPI I/O read signal, active low ATAPI I/O write signal, active low ATAPI data ready signal, active high ATAPI device address 2 / SM address latch enable LED for CF Digital ground Digital 3.3V ATAPI device address 1 / SM c ommand latch enable ATAPI device address 0 ATA data bit 0 ATA data bit 1 ATA data bit 8 ATA data bit 2
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10 GND 12 CFD15_SMRE 13 CFCS0 14 CFCS1 15 CFDRN 16 CFDWN 17 CFDRDY
18 CFDA2_SMALE DO 8mA 19 LED_CF 20 GND 21 VDD DO 8mA PWR PWR
22 CFDA1_SMCLE DO 8mA 23 CFDA0 24 CFD0 25 CFD1 26 CFD8 27 CFD2 DO 8mA DIO 8mA PD DIO 8mA PD DIO 8mA PD DIO 8mA PD
SN11030
2002/6/26 0.2 28 FLCE 29 NC 30 NC 31 NC 32 LED_CFSM 33 RSTN 34 TEST 35 SMCE 36 CFD9 37 CFD10 38 XIN 39 XOUT 40 VDD 41 GND 42 SMCDET 43 SMWPSW 44 SMPOWER 45 GPIO0 46 GPIO1 47 ROMCS 48 SYSCFG1 49 SYSCFG2 50 CFIRQ 51 HIGHPWR 52 GND 53 VDD 54 ROMSK 55 ROMDI 56 ROMDO 57 FLCDET 58 FLWPSW 59 NC DO 8mA PD DI DI DO 8mA DIO 8mA PD DIO 8mA PD I O PWR PWR DI DI DIO 8mA DIO 8mA DIO 4mA DI DI DI DI PWR PWR DIO 4mA DIO 4mA DIO 4mA DI DI PU PU PU PU PD DO 8mA Flash chip enable Not Connected Not Connected Not Connected LED for CF + SM Chip reset Test pin SM chip enable ATA data bit 9 ATA data bit 10
Confidential
Crystal input or oscillator input Crystal output or no connection Digital 3.3V Digital ground SM card detect SM write protect switch SM/Flash power control General Purpose Input/Output 0 General Purpose Input/Output 1 Chip select for external EEPROM System configuration 1 System configuration 2 ATA interrupt request High power/Low power configuration Digital ground Digital 3.3V Clock for external serial EEPROM Serial data to external EEPROM Serial data from external EEPROM Flash card detect Flash write protect switch Not Connected
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DO 8mA OC
SN11030
2002/6/26 0.2 60 LED_SM 61 TAVDD 62 AVDD 63 AVSS 64 TAVSS 65 DPLUS 66 DMINUS 67 NC 68 NC 69 CFRSTN 70 GPIO7 71 CFCDET 72 CFPOWER 73 NC 74 NC 75 NC 76 NC 77 CFD3_SMD4 78 CFD11_SMD5 79 CFD4_SMD3 80 VDD DIO 8mA PD DIO 8mA PD DIO 8mA PD P DO 8mA DIO 8mA DI 8mA PU DO 8mA OC DO 8mA PWR PWR PWR PWR AIO AIO LED for SM
Confidential
USB transceiver 3.3V PLL analog 3.3V PLL analog ground USB transceiver ground USB D+ signal USB D- signal Not Connected Not Connected ATA reset, active low GPIO7 for SM data bus OE CF card detect CF power control Not Connected Not Connected Not Connected Not Connected ATA data bit 3 / SM data bit 4 ATA data bit 11 / SM data bit 5 ATA data bit 4 / SM data bit 3 Digital 3.3V
P: power pin; AI: analog input pin, AIO: analog input/output pin; DI: digital input pin; DO: digital output pin; DIO: digital input/output pin.

TTL: TTL compatible input pin; PD: pull down; PU: pull up. All pads are Schmitt triggered and with slew rate control
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SN11030
2002/6/26 0.2
Confidential
4 Package diagram
LQPF 80 Package L E D | SN MC FF LL WC PD SE WT H I R RR GC O OM V G H F M MO I D DS DN P R W O I KDD RQ S Y S C F G 2 S Y S C F G 1 RG OP MI CO S1 G P I O 0 SSS MMM P WC OP DG WS E N E WT R D
60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 TVD AD AD VD AS VS TVS AS DLS PU DINS MU N C N C CRT FSN GI 7 PO CCE FDT CPW FR E O N C N C N C N C CD_M F3S D 4 CD1S D F1_M5 CDS D F4 M3 _ VD D VD D XU OT X IN CD F1 0 CD F9 SC M E TS ET RT SN LDCS E_ FM N C N C N C FC LE CD F2 CD F8 CD F1 CD F0 CD0 FA CD1S CE FA_ML VD D 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 G C C C C C S S VG C C C FF FFF N F F F D D MM DN D D C DDDD DD 1 5 1 6 1 WR 2 | 3 | |4 P B 71 S | | | |5 SSSSS SS0 M MM M M MR DDDDD WM 62710 EE C F C S 1 CC CC LG FF FF ED DD DD DN | RWRA C NN D2 F Y| S M A L E
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61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80
SN11030
2002/6/26 0.2
Confidential
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SN11030
2002/6/26 0.2
Confidential
5 Version Control
Draft 0.1 0.2 Apr-29-2002 June-17-2002 June-25-2002
add new pin outs & features for version 002
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